发明名称 PROGRAMMABLE SEQUENCE CONTROLLER
摘要 PURPOSE:To use plural CPUs which fit to a minimum scale programmable sequence controller (PLC) as one set of large sized PLC, by connecting them with each other. CONSTITUTION:Data taken in from an I/O input 13 are transferred to all PLCs 45 and 46 connected to a transfer line 47 through the transfer line 47. The connected PLCs deliver own I/O input data in order. To the line 47, all input data of all the PLCs are successively sent. When the I/O input data are successively planted in an input image memory 51, all I/O input data of all the PLCs are planted in the image memory 51. When the PLCs complete successive delivery of own I/O input data in order, they wait to the next turn. They repeat this procedure. Program instructions planted in a program memory 11 are successively executed at an operating section 12. Operated results issued through output instructions are directly sent to an I/O output 14.
申请公布号 JPS57182203(A) 申请公布日期 1982.11.10
申请号 JP19810065160 申请日期 1981.05.01
申请人 HITACHI SEISAKUSHO KK 发明人 ASADA KAZUYOSHI;TAKAGI MASAOKI
分类号 G05B19/05 主分类号 G05B19/05
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