| 摘要 |
PURPOSE:To reduce the gate resistance and make lateral diffusion small by forming a structure equipped with an insulation film coating the side wall surface of the silicide layer of a high melting point metal constituting a gate electrode, and with a conductive semiconductor region disposed in an array with the insulation film on an active layer. CONSTITUTION:Si ions are implanted to the element-forming region at the surface layer part of a semi-insulation substrate 11 of compound semiconductor, and heat treatment for activation is carried out; thereby an N type active layer 12 is formed. Next, a triple layer of the silicide layer of high melting point metal such as a WSi layer 13, an intermediate layer such as a Tin layer 14, and a high conductive metallic layer 15 of Au or the like. Then, the layer 13 is selectively removed by the use of CF4 for reaction gas, and an SiO2 film 17 is formed over the entire surface. The unnecessary part of the SiO2 film 17 is removed by means of CHF3. In the state that the side wall part of the layer 13 is coated with an SiO2 film 16, N<+> type GaAs layers 16 are selectively grown. The end of this layer 16 does not contact with the layer 13, which causes no decrease in withstand voltages of the gate and source or drain. |
