| 摘要 |
<p>PURPOSE:To synchronize at high speed the signals received from the units or elements with each other with application of an independent synchronization system by using a synchronizing signal selecting/holding circuit, a clock selection circuit, etc. CONSTITUTION:The external signals S are inputted in common to the synchronizing circuits 1-1 - 1-n from other units or elements. Then these circuits 1-1 - 1-n are successively synchronized at the rise of the clock signals phi1 - phin received from a clock generating circuit 4. In this case, only the synchronizing external signal that is first synchronized by a synchronizing signal selecting/holding circuit 2 is outputted to a processing part 5 as a synchronizing external signal S'' out of those synchronizing external signals S'1 - S'n. At the same time, the signals phi1 - phin undergo the gate control via a clock selection circuit 3 in response to a selection control signal including the signal S''. Then only the clock signal related to the production of the signal S'' is selectively outputted in principle to the part 5 as a processing clock signal phi. As a result, the signals supplied from the units or elements can be synchronized with each other at a high speed with application of an independent synchronization system.</p> |
