发明名称 SYNCHRONIZING CIRCUIT FOR PERSONAL COMPUTER
摘要 PURPOSE:To reduce the horizontal jitter of a picture due to a personal computer video signal by providing an edge detecting circuit which outputs an edge detection signal and a system clock selecting circuit which outputs a system clock select signal and giving each select signal to a counter to output a system clock. CONSTITUTION:An edge detecting circuit ED which outputs a first edge detection signal, which has the edge changed synchronously with the trailing edge of a primary oscillation clock, as a first external synchronizing signal and outputs a second edge detection signal, which has the edge changed synchronously with the leading edge of the next primary oscillation clock, as a second external synchronizing signal and a system clock selecting circuit ST which outputs first and second system clock select signals are provided, and each system clock select signal from the system clock selecting circuit ST is given to a counter CT to output the system clock. The variation of external synchronizing signals from the primary oscillation clock is held within a half of the primary oscillation clock. Thus, the horizontal jitter of the personal computer picture due to the personal computer video signal is reduced.
申请公布号 JPH0311394(A) 申请公布日期 1991.01.18
申请号 JP19890145871 申请日期 1989.06.08
申请人 SHARP CORP 发明人 TSUDA SUSUMU
分类号 G06F1/12;G09G5/12;G09G5/40;H04L7/00;H04N5/445 主分类号 G06F1/12
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