发明名称 Series-parallel converter maintaining input word structure
摘要 The series/parallel converter (1) is supplied by a bit sequence comprising n-bit words for series/parallel conversion word by word. The word boundaries in the input bit sequence are detected via a synchronising circuit, to provide a control signal by comparing the word boundaries with the series/parallel converter clock phase. This control signal is fed to a circuit which arranges the bit groups (Bi) received from the series/parallel converter into words (Wi) which are output in parallel.
申请公布号 DE3922482(A1) 申请公布日期 1991.01.17
申请号 DE19893922482 申请日期 1989.07.08
申请人 STANDARD ELEKTRIK LORENZ AG, 7000 STUTTGART, DE 发明人 TURBAN, KARL-ALBERT, 7016 GERLINGEN, DE
分类号 H03M9/00;H04J3/06 主分类号 H03M9/00
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