| 摘要 |
<p>A programmable semiconductor memory apparatus comprises a memory cell array (1, 2, 3), a data sense circuit (4) for reading data from the memory cell array, and a bus line (Bu1,...) connected to a common node of a plurality of bit lines (B1, B2,...) forming the memory cell array and to the data sense circuit (4), a circuit (Q1D,...) for storing an identifying code for identifying the programmable semiconductor memory apparatus is connected to the bus line, thereby enabling the identifying code to be read externally.</p> |
