| 摘要 |
<p>A frequency synthesiser comprising a phase locked loop having a reference oscillator (8) coupled to a first input of a comparator (6), a voltage controlled oscillator (VCO) (2) for providing an output signal, which output signal is fed back by way of a divider circuit (4) or dividing the output fequency by a factor N to a second input of said comparator, the output of the comparator being applied to a control input of the VCO, and including input means for applying a modulating signal in binary format via integrator means (26) for control of the divider circuit, and means having a predetermined transfer function (22) coupling said modulating signal to the control input of the VCO whereby to provide a modulation of the output signal in desired format.</p> |
