| 摘要 |
In a variable-length coding/decoding device, an rxm-bit data word is converted into an rxn-bit code word, where r is an integer having the relationship 1</=r</=rmax, a basic data word length consists of a m bits (m is a positive integer), and a basic code word length consists of n bits (n is a positive integer), and each of data words of a variable-length run-length-limited code limiting the run number of bits of a first value (e.g., "o") between successive bits of a second value (e.g., "1") in a binary-coded bit string generated by concatenation of code words after the conversion to a value no smaller than d and no larger than k into a code word corresponding to thereto. At that time, an input data word is once coded into an rmax xq-bit (q is a positive integer) code word, and then divided into rmax blocks each consisting of q bits, and a code word in each of the blocks is coded to obtain a variable-length run-length-limited code word. Also, the variable-length run-length-limited code word is inverted into a data word corresponding thereto. At that time, the input code word is divided into rmax blocks each consisting of n bits, and a code word in each of the blocks is once decoded into a q-bit (q is a positive integer) code word. Then, the rmaxxq-bit code word is decoded to obtain a data word.
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