发明名称 Semiconductor memory device with an improved substrate back-bias arrangement
摘要 A substrate back bias voltage generator of a dynamic type RAM is provided with a first voltage generator having a relatively large current supply capacity, a second voltage generator having a relatively small current supply capacity, and a substrate back bias voltage detecting circuit for controlling operation of the first voltage generator. For example, when the dynamic type RAM is in a &upbar& C before &upbar& R refresh mode, the operation of the first voltage generator is limited selectively, and the operation of the second voltage generator and the substrate back bias voltage detecting circuit is stopped selectively.
申请公布号 US4985869(A) 申请公布日期 1991.01.15
申请号 US19890375492 申请日期 1989.07.05
申请人 HITACHI, LTD. 发明人 MIYAMOTO, EIJI
分类号 G05F3/20;G11C11/4074 主分类号 G05F3/20
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