发明名称 Integrated logic for controlling functions in PCM branch exchange
摘要 An external memory is designed as a number of pages each associated with a particular function. The memory is electrically connected to a single circuit in which there is integrated a circuit for generating clock signals relative to PCM system frame and a non-blocking circuit for PCM system switching of one hundred and sixty channels subdivided into five links at a bitrate of 2 Mbits/s. A circuit controls the signalling channels between peripheral channels and the real control unit, with four simultaneous conferences of three users each provided. A PCM system tone generation is included as well as a circuit for signal peak level measurement, and auxiliary circuits for testing the integrated circuits. The whole is controlled by a microprocessor which allows the simultaneous operation of integrated circuits by subdividing the external memory by a time division technique.
申请公布号 IT1226444(B) 申请公布日期 1991.01.15
申请号 IT19880021804 申请日期 1988.09.01
申请人 CATTANEO LUIGI SPA 发明人 CATTANEO GEROLAMO;CATTANEO ERINO;BONARELLI ROBERTO
分类号 H02N;(IPC1-7):H02N/ 主分类号 H02N
代理机构 代理人
主权项
地址