| 摘要 |
<p>PURPOSE:To shorten the waiting time for the start of a CPU by dividing a source clock signal obtained from a source clock oscillating circuit, selecting the source clock signal or a divided clock of a dividing means, and applying the divided clock and then the source clock signal to a CPU at start up of the CPU. CONSTITUTION:The clock signal given from a source clock oscillating circuit 30 is applied to a clock signal generating block 3, and the output signal of the block 3 is applied to a divider 141 via a clock signal output line 7. The divider 141 divides the received clock signal down to 1/8, for example, and applies this divided clock to a CPU 2 via a clock signal input line 8. Thus the CPU 2 starts immediately. Thus the processing speed of the CPU 2 is slowed down to 1/8 compared with the speed secured with application of the clock signal when a divided clock is applied to the CPU 2. However the CPU 2 can starts with a small waiting time from a time point when an interruption request signal is received. As a result, the CPU 2 can be started with a small waiting time and no counter is required.</p> |
