发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To reduce the capacity of a conversion table and to decrease the number of logical gates forming the conversion table by producing a secondary scan address based on the conversion unit identification information given to a primary scan address. CONSTITUTION:A primary scan address set to an address register 1 is sent to a conversion unit identifying device 5. Thus the conversion unit identification information is checked and a conversion unit is decided. An address conversion table 4 is retrieved based on the conversion unit, and a secondary scan address is read out of the table 4. The secondary scan address is set to an output address register 19 and sent to an address group. Thus it is possible to produce a conversion table with only the memory elements which hold the information requiring the conversion of scan addresses. As a result, the capacity of the table 4 is reduced and the number of logical gates forming the table 4 is also decreased.
申请公布号 JPH036746(A) 申请公布日期 1991.01.14
申请号 JP19890141043 申请日期 1989.06.05
申请人 HITACHI LTD;HITACHI COMPUT ENG CORP LTD 发明人 HIBI KAZUO;HASHIMOTO YOJI;SHIMURA NOBUYUKI;ASASHITA TOMOYOSHI
分类号 G06F11/22;G06F12/00;G06F12/02 主分类号 G06F11/22
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