SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE:To equivalently improve speed for the amplifying operation of a main amplifier by providing the amplifier circuit of a latch style to be activated by a prescribed timing signal to a common complementary data line to be connected to a complementary data line to which a memory cell is coupled through a column switch circuit. CONSTITUTION:The input of a main amplifier MA and an amplifier circuit AMP including an amplifier MOSFET of the latch style to be activated by the prescribed timing signal are connected to the common complementary data line to be connected through the column switch circuit to the complementary data line to which the memory cell is coupled. Accordingly, a read signal, which is transmitted to the common complementary data line, is amplified in the manner of a direct current as well by the amplifier circuit AMP of the latch style. Thus, the speed for the amplifying operation of the main amplifier MA can be equivalently improved.