Static memory cell with two transistors - has two complementary MOSFET(s), with first N-channel FET source electrode forming cell input

摘要

The input signal is supplied to one transistor for setting the memory cell, while the output of the other transistor is coupled to the first transistor input. Thus one transistor is always conductive and the other blocked. The two transistor (1,12) are of complementary MOSFET type. The source electrode of the first n-channel transistor forms the input of the cell. The drain electrode (D) of the first transistor (1) is coupled to the source electrode (Sp) of the second p-channel transistor (12). The drain electrode (Dp) of the second transistor is fed back to the source electrode (S) of the first transistor. ADVANTAGE - Low-cost mfr. w.r.t. additional components, and facility for integration on semiconductor chip.