| 摘要 |
<p>A conditional-sum carry structure (11) has architecture which is sufficiently regular that the structure can be conveniently generated by automated compiler. The carry structure (11) includes a column of input cells (left column), each of the cells (CC) in the column being operative for receiving binary numbers (A, B) and, for each of the received numbers, generating a sum bit (S) and two carry-out bits (C0, C1). Further the carry structure (11) includes an array of columns of binary logic elements comprised of dual multiplexers (MUX MUX elements), dual exclusive OR gates (XOR XOR elements), multiplixer and exclusive OR gate circuits (MUX XOR elements) and multiplixer units (ONE MUX elements) for receiving sum bits and carry-out bits from the input cells and for performing the operations of a conditional-sum carry structure (11).</p> |
