| 摘要 |
PURPOSE:To improve efficiency of a microcomputer system by providing a RAM array of small capacity and a up-down counter for address generation which outputs sequentially exciting data stored in each address of the RAM array and by generating an exciting pattern by a hardware. CONSTITUTION:An exciting pattern is written into a RAM array 1 beforehand at arbitrary timings such as a time whereat a microcomputer is initialized after power-on-reset and so forth. When a CPU receives an instruction for rotating a stepping motor, the CPU calculates the timings to generate the exciting pattern, outputs pulses to an address counter via an I/O port at predetermined timings, and completes a processing. Thereafter, the CPU turns its processing to another one. Therefore, if only the CPU would process the calculation of the output timings of the pulses and the operation for outputting the pulses, the CPU serves well and is released from processings to give and receive data affected by low speed external memories. |
