发明名称 Demodulation circuit.
摘要 In analog communication, a transmission signal must be demodulated with good linearity. However, linearity of a reception signal is often impaired due to a too large input signal or variations during the manufacture of elements or a fluctuation in power supply voltage. According to this invention, a plurality of source-follower circuits constituting a demodulation circuit are formed on a single semiconductor substrate, a resistor (R12) having a high resistance is connected between the gate and the source of a first FET (Q11), and another resistor (R13) is connected to the source. The gate of each of the second and subsequent FETs (Q12) is connected to the source of the immediately preceding FET (Q11), and its source is connected to the gate of the next FET. A product of a gate width of each of the second and subsequent FETs (Q12) and a resistance of the resistor (R14) connected to the source is set to be equal to that of the first FET (Q11). An operation gate voltage of each FET is set to fall within a range wherein the relationship between the operation gate voltage and a drain current linearly changes. Since the FETs are formed on the single substrate, rates of variations during the manufacture of the elements and a fluctuation in power supply voltage become equal to each other. Therefore, according to this invention, a reception signal can be demodulated with excellent linearity.
申请公布号 EP0406865(A2) 申请公布日期 1991.01.09
申请号 EP19900112862 申请日期 1990.07.05
申请人 SUMITOMO ELECTRIC INDUSTRIES, LTD. 发明人 SHIGA, NOBUO, C/O YOKOHAMA WORKS
分类号 H04B10/60;H04B10/2507;H04B10/40;H04B10/50;H04N7/22 主分类号 H04B10/60
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