发明名称 |
High speed static BiCMOS memory with dual read ports |
摘要 |
A memory includes a plurality of cells with each cell containing a pair of cross-coupled N-channel field-effect transistors having set a reset nodes. Also in each cell, a first P-channel transistor couples a first select line to the set node; a first bipolar transistor couples the set node to a first bit line; a second P-channel trnasistor couples a second select line to the reset node; and a second bipolar transistor couples the reset node to a second bit line. Data is read from one port of the cell by pulling up just the set node via the first selected line and first P-channel transistor; and data is read from another port of the cell by pulling up just the reset node via the second select line and second P-channel transistor. Both such reads are fast since the parasitic capacitance of each select line is dependent on just a single pull-up transistor per cell. Also the cell is small in size since it is made with two less transistors than a conventional cell.
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申请公布号 |
US4984203(A) |
申请公布日期 |
1991.01.08 |
申请号 |
US19890453567 |
申请日期 |
1989.12.20 |
申请人 |
UNISYS CORPORATION |
发明人 |
SHOOKHTIM, RIMON;LEE, LO-SHAN;MANSOORIAN, BABAK |
分类号 |
G11C8/16 |
主分类号 |
G11C8/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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