发明名称 PICTURE QUANTIZATION CIRCUIT
摘要 PURPOSE:To quantize lots of difference picture element data at a high speed by providing an address register for an external quantization table ROM independently so as to attain quantization with a minimum clock cycle number. CONSTITUTION:A picture data before quantization is read out of an internal RAM 31 and stored tentatively in an external address register 33. In the next clock cycle, the stored picture data of the external address register 33 is used to access a quantization table memory 32 and the address to the internal RAM 31 is updated is to read a picture data. Thus, the readout access to the internal RAM 31 and the quantization table memory 32 is implemented simultaneously in the same clock cycle to attain high speed quantization processing. Moreover, a selector 34 is controlled to fix a high-order bit of an external address register 33 and only the word length of the quantized picture data is written in the external address register 33 and the index of the memory to an external expansion port is facilitated.
申请公布号 JPH031786(A) 申请公布日期 1991.01.08
申请号 JP19890136515 申请日期 1989.05.30
申请人 FUJITSU LTD 发明人 ITO AKIRA
分类号 H04N19/00;H04N1/415;H04N19/42;H04N19/423;H04N19/503 主分类号 H04N19/00
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