发明名称 DATA WRITING AND ERASING METHOD FOR SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To increase reloadable time without increasing the number of manufacture processes or the size of a cell by separating a current path for writing and erasing into a source area and a drain area. CONSTITUTION:A source area 23 and a drain area 22, in which the concentration of impurity is almost equal, are formed in a substrate and a floating gate 25 and a control gate 27 are formed through insulating films 24 and 26 on the substrate. When data are written, an electric charge is injected to the floating gate 27 near the drain area 22 and the data are erased, the electric charge is neutralized in the floating gate 27 near the source area 23. Then, each current path is separated for the time of writing and the time of erasing and the insulating films 24 and 26 under the floating gate 27 are suppressed to be degraded. Thus, since the concentration of the impurity is almost equal in the source area 23 and drain area 22, the number of the manufacture processes can be decreased and the size of the cell can be reduced. Then, the reloadable time can be increased.</p>
申请公布号 JPH031396(A) 申请公布日期 1991.01.08
申请号 JP19890135061 申请日期 1989.05.29
申请人 OKI ELECTRIC IND CO LTD 发明人 ONO TAKASHI
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/06;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C17/00
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