| 摘要 |
PURPOSE:To decrease the maximum quantity of the slippage, from the former pattern, of a pattern by exposure in and after the third process so that it may cope enough with high integration such as LSI, etc., by estimating the position of a wafer by the average value of the results of measurement of each position of a wafer using plural alignment marks formed in a preceding process. CONSTITUTION:In the first process, an alignment mark 11 is formed at the same time with formation of a pattern 1. And by detecting this alignment mark 11, and calculating the slippage between the sought coordinates of point P and the preset reference coordinates, and performing the same action at several points on the wafer, the total slippage of the wafer is estimated, and while performing compensation based on it, the exposure of a pattern II is done. In this second process, together with the pattern II an alignment mark 12 is formed. Next, both of the alignment marks 11 and 12 are detected, and the coordinates of point P and point Q are sought and those average is sought, and that is done at several points on the wafer so as to estimate the total slippage of the wafer. Accordingly, the maximum value of the slippage to the pattern in the second process is leveled and decreases. |
