发明名称
摘要 PURPOSE:To perform flat wiring-layer connection without a step part to a connecting part, by burying a contact hole in an insulating film on a lower wiring layer with amorphous Si, substituting the amorphous Si into W by the reaction of WF6 and Si, and thereafter providing an upper wiring layer. CONSTITUTION:On an Si substrate 1, an SiO2 insulating film 2, a first Al wiring layer 3 and a PSG insulating film 4 are laminated. A photoresist mask 7 is applied and a contact hole 5 is formed. An alumina layer 10 undergoes plasma etching by using the mixed gas of BCl3 and PCl3 and the layer 10 is removed. The activated Al is exposed. Then, SiH4 is kept at 1 torr, and amorphous Si 8 is formed at 100 deg.C or less by plasma reaction. The amorphous Si 8 is lifted off together with the mask 7. The a-Si is substituted into W by thermal decomposition reaction at about 400 deg.C. For control of reaction speed, inactive gas is added. As a result, the flat PSG film 4, in which the W 9 is embedded in the contact hole 5, is obtained. A second Al insulating layer 6 is laminated on the film 4. In this constitution, the flat wiring layer connection can be provided, and reliability is improved.
申请公布号 JPH0262951(B2) 申请公布日期 1990.12.27
申请号 JP19850100223 申请日期 1985.05.10
申请人 FUJITSU LTD 发明人 SHIOTANI YOSHIMI;OOYAMA YASUSHI
分类号 H01L21/3205;H01L21/768 主分类号 H01L21/3205
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