| 摘要 |
<p>A multiplying digital to analog converter comprises shunt legs wherein a switch (15) has a common terminal connected to a respective node (12) in the series path and two switchable terminals each connected to a respective resistor. Each series branch consists of a dummy switch (28) in series with a series resistor (13) having half the resistance value of each of the shunt resistors (14', 14''). The switches, which are preferably implemented in CMOS technology, are physically matched and the switches in the series arms are configured to be closed so that the resistance of each dummy switch is half that of the switch in the respective shunt leg. The arrangement enables the preservation of the R-2R relationship between the series and shunt resistances and thereby substantially improves the linearity of the converter.</p> |
