| 摘要 |
<p>PURPOSE:To transfer a data without giving a load to a host processor by recognizing the kind of data to be transferred based on prescribed information and allowing a data transfer controller itself to apply setting change to a data transfer destination address depending on the result of recognition. CONSTITUTION:When a control section 19 detects an assert state of a control signal, the control section 19 selects a transfer destination address register 12 according to the data transmission mode at that time and rewrites the content of the register 12 according to a head address Ame1 read from a retrieval table 20. Then the 1st byte of a data included in an information field 1 is transferred to a memory area ME 1 for a packet logic channel 1 designated by the rewritten address Ame1. Then the content of the register 12 is incremented to the succeeding address and the content of a byte count register 13 is decremented by one and the data of the 2nd byte is transferred to the area ME 1 and then the data is transferred sequentially till the content of the register 13 is zero.</p> |
