发明名称 HIGH RESOLUTION SAMPLE CLOCK GENERATOR WITH DEGLITCHER
摘要 A digital controlled clock provides ultra fine resolution for a sampling clock signal for recovering data from a received signal, the phase jump of the sampling clock signal being determined the number of stages in a multiphase clock generator that generates a number of equally-spaced phase clock outputs based on a reference clock signal. Phase selection is performed through a very low overhead phase commutator in response to phase advance/retard inputs. A clock deglitcher matched to the stages of the ring oscillator eliminates spikes generated when the phase commutator switches.
申请公布号 CA2019347(A1) 申请公布日期 1990.12.21
申请号 CA19902019347 申请日期 1990.06.20
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 WONG, HEE;GUINEA, JESUS
分类号 H03L7/00;H03L7/099;H04L7/00;H04L7/033;(IPC1-7):H03K5/135 主分类号 H03L7/00
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