发明名称 A flag counter circuit
摘要 The circuit counts pre-amble and post-amble synchronisation characters in a serial bit stream transmitted from one computer to another in a local area network and comprises: a detector circuit (2) for detecting the synchronisation characters of a serial bit stream and generating a synchronous output pulse for each synchronisation character detected; a counter circuit (3) for counting the number of output pulses generated by the detector circuit (2) and generating a terminal count output signal when a predetermined number of output pulses have been counted; and an interrupter circuit (4) for generating an interrupt request signal for the computer transmitting or receiving the serial bit stream on receipt of the terminal count output signal. <IMAGE>
申请公布号 GB2232857(A) 申请公布日期 1990.12.19
申请号 GB19890013600 申请日期 1989.06.13
申请人 * RESEARCH MACHINES LIMITED 发明人 DOUGLAS STUART * DAVIDSON
分类号 H04L29/06;H04L29/08 主分类号 H04L29/06
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