发明名称 SEMICONDUCTOR LOGIC CIRCUIT
摘要 PURPOSE:To decrease the through-current to a next-stage by turning on a current limit FET when an output approaches a value depending on the Schottky characteristic of a FET input to the next-stage so as to limit the potential rise at a connecting point between a load element and a drive FET. CONSTITUTION:When an input signal supplied to an input terminal 12 goes to a low level, a MESFET 12 is turned on, its drain potential rises, the level is shifted with a source follower section 10b and impedance is converted and the resulting signal is outputted from an output terminal 22. The output signal level rises with the rise of the drain potential of the MESFET 12 and when the level reaches a prescribed value, a current limit MESFET 23 is turned on to suppress the rise in the drain potential of the MESFET 12. Thus, a high level appearing at the output terminal 22 when the MESFET 24 is turned on depends on a level shift voltage of an SBD 24, and suppressed to a value lower than the high level depending on the Schottky characteristic of the MESFET input of the next stage.
申请公布号 JPH02303215(A) 申请公布日期 1990.12.17
申请号 JP19890123441 申请日期 1989.05.17
申请人 SUMITOMO ELECTRIC IND LTD 发明人 HIRAKATA NOBUYUKI
分类号 H03K19/00;H03K19/0185 主分类号 H03K19/00
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