| 摘要 |
PURPOSE:To pick up an isolated picture element effectively and to obtain a reduced picture with very excellent reproducibility and readable performance by shifting an interleaved location by one bit automatically when a picture element data located at the interleaved location is the isolated picture element so as to interleave a succeeding picture element data. CONSTITUTION:When a reduction rate is 50-99%, A CPU 5 sends a selection signal '1' to inactivate an AND circuit 308 for simple interleaving and the activate a flip-flop 303 and an AND circuit 305. That is, a picture element data D1 after the output, an output data D2, a succeeding data D3 before output and a succeeding to succeeding data D4 are stored in an N-bit register 301 in 4-bit while being shifted sequentially based on a synchronizing clock, the 4-bit data D1-D4 are read in parallel at a discrimination circuit 302 for each increment and when the output data D2 is an isolated picture element in black or white level dot, a Hi signal is outputted from the discrimination circuit 302, the flip-flop 303 is operated to retard the interleave designation input sent from an interval setting circuit 31 by one bit and the designation signal is sent to a write control circuit 3 via an OR circuit 306 and the succeeding picture element data D3 is interleaved. |
