发明名称 SENSE AMPLIFIER CIRCUIT
摘要 <p>PURPOSE:To prevent excessive charge-up to a bit line capacitor from being performed and to attain a fast operation by providing an excessive charge detection circuit and an excessive charge discharging circuit to the bit line capacitor at a sense amplifier circuit for a read-only memory. CONSTITUTION:When the excessive charge detection circuit 24 detects the excessive charge-up by receiving bit line potential Va, the excessive charge discharging circuit 25 is operated, and discharges the excessive potential of a bit line. When the bit line potential is decreased by the above discharge and an excessive charge-up state is eliminated, the operation of the circuit 25 is stopped. Thereby, it is possible to reduce sense time lag for the discharge of the excessive charge, and to attain acceleration and high integration.</p>
申请公布号 JPH02301100(A) 申请公布日期 1990.12.13
申请号 JP19890121927 申请日期 1989.05.16
申请人 FUJITSU LTD 发明人 RYU YASUSHI
分类号 G11C17/00;G11C7/06;G11C7/12;G11C16/06;G11C16/26;G11C17/12;H01L27/10 主分类号 G11C17/00
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