发明名称 Identifying signal line connected to known line via short circuit - by applying probe to faulty line to detect signals as digital levels are applied to PCB inputs
摘要 A computer controlled tester, connected to a circuit board carrying a signal line to be identified, has a display unit and a digital level detection probe (TS) connected to a test value memory. The probe is connected to a faulty signal line and digital levels applied to the board (FBG) inputs (EA) sequentially according to prederfined values from bit pattern sets (B1-Bn). Measured values are compared with desired values for the faulty line to form a reference value for comparison with anticipated values on the remaining signal lines. USE/ADVANTAGE - Detecting line shorted to detected faulty signal line p.c.b. without component removal.
申请公布号 DE4004750(A1) 申请公布日期 1990.12.13
申请号 DE19904004750 申请日期 1990.02.15
申请人 SIEMENS AG, 1000 BERLIN UND 8000 MUENCHEN, DE 发明人 PFLUG, GERHARD, DIPL.-ING., 8000 MUENCHEN, DE;KERN, FRANZ, DIPL.-ING. (FH), 8905 MERING, DE;SCHEDLER, PETER, 8930 SCHWABMUENCHEN, DE;STAERZ, WALTER, 8900 AUGSBURG, DE
分类号 G01R31/02;G06F11/273 主分类号 G01R31/02
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