| 摘要 |
<p>When data read out from a memory cell array (11) is output to an external device through an output buffer (15), a first read control pulse signal (P1) and a second read control pulse signal (P2a) are generated in response to a change in address signal (Add). An operation for reading out data is controlled using the first and second read control pulse signals (P1, P2a). By such control, when an address signal (Add) seems to be changed by noise generated by a change in power source potential or the like due to a change in output, the noise can be removed, and thus the output (15) buffer is not erroneously operated.</p> |
