发明名称 GATE CIRCUIT OF ULTRASONIC FLAW DETECTOR
摘要 PURPOSE:To rapidly and accurately perform inspection by detecting the max. value of the detection signals in a gate and comparing the detection signal with the output signal of a max. value detection means and latching the count value of a counter when the latter is larger than the former. CONSTITUTION:A buffer 21 becomes a continuity state by the gate timing signal outputted from the gate signal generator 24 of a gate circuit 20 and only the detection signal outputted from a detection circuit 7 and present within the aimed inspection region of a material to be inspected is outputted as the output signal of the buffer 21. Next, the max. value among the detection signals outputted from the buffer 21 is detected by a peak detector 22 and a comparator 28 compares the detection signal outputted from the buffer 21 with the max. value from the peak detector 22 and, when the latter is larger than the former, the count value of the counter of the gate signal generator 24 starting counting simultaneously with the excitation of a probe 2 at that point of time is latched by a gate latch 26 and the size and position of a flaw are calculated as numerical values from the detected max. value and the latched count value.
申请公布号 JPH02298863(A) 申请公布日期 1990.12.11
申请号 JP19890118728 申请日期 1989.05.15
申请人 HITACHI CONSTR MACH CO LTD 发明人 AOKI SHIGENORI;IZUMI EIKI;TANAKA YASUO
分类号 G01N29/38;G01N29/22 主分类号 G01N29/38
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