发明名称
摘要 PURPOSE:To enable to offer the potential to a substrate from the both main surface sides of the substrate, by providing a poly Si layer of the same conductive type as the substrate, on the required part in an insulation and isolation region surrounding an element forming region, so as to reach the substrate. CONSTITUTION:An n<+> type buried layer 2 and a poly Si thin film 15 are formed on the p type Si substrate 1, and an n type layer 16 and an n type poly Si layer 17 are epitaxial-formed. They are filled with an SiO2 layer 9, after the n type layer 16 is etching-removed by applying a double layer mask of an SiO2 18 and an Si3N4 19, and a channel cut 8 is provided. The mask is removed, then a resist mask 21 having a window 20 is applied, and B ions are implanted 22. The mask 21 is removed, then a CVD SiO2 23 is applied to coating, annealed and diffused to layers 3, 15 and 17, and accordingly p type layers 4 and 24 are formed. Next, the SiO3 is opened window, and thus n<+> type layers 5 and 6 and an electrode 27 are deposited. By the p type poly Si layer 24 connected to the main surface on the p type substrate 1, the back surface of the p type substrate 1 is fixed on an insulator, or the potential can be given to the p type substrate 1 also in case of exposure to gas.
申请公布号 JPH0258781(B2) 申请公布日期 1990.12.10
申请号 JP19820026401 申请日期 1982.02.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 KATO SHUICHI
分类号 H01L21/822;H01L21/205;H01L21/331;H01L21/76;H01L21/762;H01L27/04;H01L29/73 主分类号 H01L21/822
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