| 摘要 |
PURPOSE:To simply adjust a balance and a level of signals of left and right channels objectively by controlling an input attenuate resistor in response to an input level so as only to input an adjust signal commanding the circuit operation. CONSTITUTION:Simultaneously at application of power, a clock circuit 20 outputs a 1st clock signal 29 so s to allow a 1st latch circuit 14 to latch a preset value 16 and outputs the latched value to a ROM 18. The clock circuit 20 outputs a 2nd clock signal 31 and a 2nd latch circuit 32 latches an output of an adder 21. The 2nd latch circuit 32 outputs the latched value to a D/A converter 23. Then the D/A converter 23 outputs an analog value in response to the digital output of the 2nd latch circuit 32 and uses the analog output to control the attenuation of a VR 3. Thus, it is possible to make nearly constant for the output of the VR 3 by the input of the adjust signal 27. |
