发明名称 Gallium arsenide FET with damage zone at gate side - has charge integral reduced over channel depth at gate side
摘要 Since the damage zone (A) is in region laterally to the FET gate (6), the forming of the damage zone results in diminishing of the charge integral over the channel depth laturally to the gate pref the damage zone is formed by implantation and may be limited to a narrow region along the gate. It may lie along the drain side of the gate, which may be alloyed or recessed. The direct gate foot is typically covered during the damage zone formation. The damage zone may reach as deep as the gate. USE/ADVANTAGE - For gallium assuide FETs, with increased breakdown voltage.
申请公布号 DE4014128(A1) 申请公布日期 1990.12.06
申请号 DE19904014128 申请日期 1990.05.02
申请人 SIEMENS AG, 1000 BERLIN UND 8000 MUENCHEN, DE 发明人 HUBER, JAKOB, DIPL.-PHYS., 8201 BEYHARTING, DE
分类号 H01L29/10 主分类号 H01L29/10
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