| 摘要 |
PURPOSE: To provide a programmable delay line which gives a selectable high- precision time delay to an electronic signal by measuring actual signal delay of respective delay stages and selecting a delay stage to be supplied with the electronic signal on the basis of the obtained signal delay. CONSTITUTION: When a gate 66 and a cycle counter 68 and both effective, the cycle counter accurately counts mutual cycles of digital pulses which are inputted successively. A microprocessor 34 when started for a 1st time controls demultiplexers(DEMUX) 22A to 30A to select respective 'B' signal paths of minimum delay paths, i.e., steps 22 to 30. Thus, the cycle counter 68 measures the actual minimum delay of a delay circuit 20. The microprocessor 34, after detecting this minimum delay, operates to control the same DEMUXes, and then a path which has relatively large delay of the delay circuit, i.e., one 'C' signal path is selected at a time while a 'B' signal path is selected by the remaining DEMUXes. Consequently, high-precision delay is given. |
