Semiconductor memory device with redundant block

摘要

A semiconductor memory device comprises a plurality of normal memory blocks NB containing only normal memory cells and a redundant memory block RB containing only redundant memory cells. Normal column decoders NCD and normal row decoders NRD are associated with the normal blocks NB. A redundant column decoder RCD and a redundant row decoder RRD are associated with the redundant block RB. A block decoder 18 selects one of the normal blocks NB in response to first address signals (A0, A0 - A3, A3): the redundant column decoder RCD selects redundant columns to replace normal columns which contain defective normal memory cells, according to the output of the block decoder and second address signals (A8, A8 - A11, A11). The decoders NCD, NRD all are disabled by a redundant control clock generator 22 when a defective normal memory cell is addressed. One of the decoders NCD is enabled by the block decoder 18 when a defect-free normal memory cell is addressed. The device addresses the problem of reducing the power consumed in conventional memory devices.