| 摘要 |
PURPOSE: To minimize the chip area and the supply current by constituting a digital comparison circuit of a serial memory array and a logic circuit which gives an interface circuit between blocks. CONSTITUTION: An FIFO memory element 10 is provided with a data input terminal 18, data output terminal 20, write clock terminal 22, read clock terminal 24 and a reset terminal 26, and these terminals are connected to an interface 16 incorporated in the element 10. A serial memory 14 of free input/output is provided on one side of the interface 16, and a flag generator 12 which receives the output from the interface 16 is connected to the opposite side. The element 10 is constituted in this manner, and plural status flag signals such as a flag signal FF from a terminal 28, an empty flag signal FF from a terminal 30, an almost full flag signal AFF from a terminal 32, and a half full flag signal HFF from a terminal 34 are outputted from the flag generator 12, and data is compared by these signals. |
