发明名称 BUS MASTER DEVICE
摘要 PURPOSE:To detect the trouble of a multiplex bus and a data output buffer without adding any parity bit and to improve the reliability of a system by outputting data onto the multiplex bus, reading this data back through an internal address bus or internal data bus, and comparing both data with each other. CONSTITUTION:The data output means of a microprocessor 1 outputs specific data onto the multiplex bus BS through, for example, the internal bus AB, data sent back from a slave device side is received through the internal data bus DB this time, and a comparing means 42 collates the data on the address bus with the sent-back data on the data bus and decides the clamp trouble of the multiplex bus unless they do not match each other. Consequently, the reliability of the information transmission of the bus master device can be secured without providing any parity bit.
申请公布号 JPH02287744(A) 申请公布日期 1990.11.27
申请号 JP19890110058 申请日期 1989.04.28
申请人 YOKOGAWA ELECTRIC CORP 发明人 HAYASHI SHUNSUKE;YASUI HITOSHI
分类号 G06F11/00;G06F13/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址