| 摘要 |
PURPOSE: To limit the potential fluctuation of an output signal within the range of potentials lower than a supplied potential by providing an amplifier/limiter circuit using a transistor for holding a limit signal within each potential range, and extracting the output signal from the interconnection part of cascade connected transmission gates. CONSTITUTION: Transistors TN3, TP3, TN4 and TP4 are constituted so that one of respective parallel pairs of transistors can be biased in a conducted state. Therefore, the parallel pair comprising transistors applies a resistant effective impedance Re. A serially connected resistor R3 applies the Thevenin resistance of R3 /2 serially with the Thevenin potential of 1/2 positive supplied voltage VD. A common source amplifier applies a peculiar output impedance R0 . On the assumption that the Thevenin resistance R2 /2 is equal with αR0 and the output potential generated from the amplifier is e0 , an output potential OUT becomes OUT=e0 /2+VD/4. Therefore, the maximum and minimum potential values to be taken for the signal OUT respectively become 3VD/4 and VD/4. |
