| 摘要 |
PURPOSE:To prevent the generation of the troubles of Al wirings, such as clock signal lines, constant-potential lines and the like in a TFT, a CMOSFET and the like, which is accompanied by an increase in the area of a device, and to obtain the semiconductor device having a high reliability in respect to its wirings by a method wherein transfer clock wirings, which have an antiphase to each other, and constantpotential wirings are formed in such a way that they are partially formed into a two-layer structure. CONSTITUTION:In a semiconductor device, which is constituted using thin film transistors 101 to 103 and 111 to 113 to be formed on an insulating substrate, transfer clock wirings 121' and 122', which have an antiphase to each other, and constant- potential wirings 123' and 124' are formed in such a way that they are partially formed into a two-layer structure. For example, a part shown by crosshatchings is formed into a two-layer structure in a part in the diagram on the clock signal lines 121' and 122' of a CMOS dynamic shift register constituted by a TFT and a part shown by mere hathcings is formed into a one-layer structure consisting of Al only. In that case, the above two-layer structure is deposited simultaneously with a polycrystalline silicon film, which is used as the material for a gate electrode of the TFT, and is constituted of the silicon film having reduced resistance and an Al film 18 deposited on the silicon film. |
