| 摘要 |
A time-division switching circuit for exchanging a time slot with another time slot in one cycle of time-division multiplexed data where the above one cycle of data comprises a plurality of time-division multiplexed data respectively having a different data formats. The switching circuit comprises: a data buffer memory a successive address generating circuit for outputting successive writing or reading addresses; an address control memory for holding reading or writing addresses; and an address setting control circuit for setting the addresses of the address control memory. The setting of the above addresses are carried out so that there are simultaneously performed both the exchanges of time slots within each time-division multiplexed data among the above plurality of time-division multiplexed data, and also the exchanges of time slots across different time-division multiplexed data among the above plurality of time-division multiplexed data for transforming a format of data in one of the above different time-division multiplexed data to another format in another of the above different time-division multiplexed data.
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