发明名称 WAFER SCALE INTEGRATION CIRCUIT
摘要 <p>PURPOSE: To allow all chips to be used for bond site chips by providing a bonding pad connecting to an input line and a bonding pad connecting to an output line to all chips or at least one chip of all clusters. CONSTITUTION: An array of chips 10 is formed on a wafer mounted on a printed circuit board(PCB) 24. Tracks for VSS, VCC, CMND and WCK are provided to an upper end of the printed circuit board. Similar tracks are provided to a lower end of the printed circuit board. Furthermore, the WCK and CMND pads in each column are connected by a metal 2 of a track 18 of an integrated circuit structure itself. Four chips 10' along the lower end of the wafer are used for bond site chips and their XMIT and RECV pads are connected to corresponding pads in pairs on the printed circuit board 24 by bonding wires 38.</p>
申请公布号 JPH02283024(A) 申请公布日期 1990.11.20
申请号 JP19890314463 申请日期 1989.12.05
申请人 ANAMAATEITSUKU LTD 发明人 ANSONII MAASHIYU;MAIKERU BURENTO;NIIRU MAKUDONARUDO
分类号 H01L21/3205;H01L23/52 主分类号 H01L21/3205
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