发明名称 |
Method and apparatus for high speed integrated circuit testing |
摘要 |
An apparatus for use in high speed digital testing of high pin count logic circuits is provided wherein a plurality of terminal electronics units (12) are connected in series to each other and to one channel (13) of a multi-channel tester. Each terminal electronics unit (12) stores a test vector from the test channel in a first mode, and applies the test vector to the circuit under test at high speed in a second mode. Each pin electronics unit can also store response data from the circuit under test. |
申请公布号 |
US4972413(A) |
申请公布日期 |
1990.11.20 |
申请号 |
US19890327878 |
申请日期 |
1989.03.23 |
申请人 |
MOTOROLA, INC. |
发明人 |
LITTLEBURY, HUGH W.;SWAPP, MAVIN C. |
分类号 |
G01R31/317;G01R31/28;G01R31/319;H01L21/66 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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