发明名称 MANUFACTURE OF VERTICAL FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To lessen ON-resistance by a method wherein polycrystalline silicon is acceleratively oxidized and a nitride film is used. CONSTITUTION:An N-type drain region 2 is epitaxially grown on the surface of an N<+>-type silicon substrate 1, and a gate insulating oxide film 3 is formed thereon as thick as 40-150nm. A polycrystalline silicon layer is deposited thereon, which is etched using a photolithography technique to form a gate electrode 4. A P-type base region 5 is formed through implantation by the use of the gate electrode 4 as a mask. An oxide film 9 is formed on the surface of the gate electrode 4 taking advantage of the accelerated oxidation of polycrystalline silicon which also enables the activation and the forced diffusion of implanted ions. Then, the part of gate oxide film, which is not covered with the gate electrode 4 and the oxide film 9, is removed, and a nitride film 10 is formed. The nitride film 9 is thermally oxidized to become thicker using the nitride film 10 as a mask. Next, the nitride film 10 is removed, and a source electrode 7 and a drain electrode 8 are formed of aluminum or the like.
申请公布号 JPH02281634(A) 申请公布日期 1990.11.19
申请号 JP19890102447 申请日期 1989.04.21
申请人 NEC CORP 发明人 YAMAMOTO MASANORI
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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