| 摘要 |
PURPOSE:To reduce the synchronizing lock time and a data error due to simultaneous error caused during the synchronizing pull-in time by using a bipolar code as an information transmission and using a frame code having a same polarity consecutive code as a frame synchronizing code. CONSTITUTION:The system consists of analog comparators 1, 2, gate circuits 3, 4, and a counter 5. In this case, a bipolar code is used for information transmission and a frame code having same polarity of consecutive code for frame synchronization is used. As the bipolar code, codes of positive and negative polarity are alternately outputted every time a level '1' of a binary signal is generated and the code of the same polarity is not consecutively outputted. Accordingly the frame code in existence in the bipolar code is easily identified by finding out the consecutive code of the same polarity. |
