| 摘要 |
PURPOSE:To reduce the interval between a collector and emitter electrodes for the decrease of parallel resistance therebetween, by partially removing a mask for thermal oxidation after etching with an Si3N4 mask on an Si substrate. CONSTITUTION:An N epitaxial layer 3 is formed on the P type Si substrate 1 having an N<+> type buried layer 2 to etch the N layer 3 by the laminated mask of thin SiO24 and Si3N45. Next, the SiO24 and Si3N45 are selectively opened hole to form thick SiO26, 7. Finally, an N collector 8, P base 9 and N emitter 10 are formed. Thus, a narrow wiring can be formed on a convex surface by providing an SiO27 in a convex form between the emitter and collector. Besides, the parallel resistance between the emitter and collector can be reduced by shortening the interval therebetween. |
