| 摘要 |
PURPOSE:To quicken the transmission speed and to obtain a picture with high resolution by adding a dummy bit to an input signal and using a mask pattern. CONSTITUTION:Dummy addition circuits 55, 56 add a dummy bit to the least significant bit of a supplied word and supply the result to a multiplexing section 58. The component other than a DC component is expressed in one word and supplied to a dummy addition circuit 57. The dummy addition circuit 57 adds a dummy bit to the least significant bit of the supplied word, a multiplexing section 58 multiplexes the supplied signal, a line interface 6 applies amplitude phase modulation to the supplied signal and sends the result to a transmission line 11. The line interface 7 applies amplitude phase demodulation to the supplied signal and a variable length decoding section 8 eliminates the dummy of the least significant bit to connect the high-order word and the low-order word based on the number of the mask pattern to form one word and an inverse orthogonal transformation section 9 applies inverse orthogonal transformation to the input signal and the inverse blocking section 10 converts the blocked signal into a conventional picture signal. Thus, the effect of the error is reduced and the quantity of information is reduced. |
