| 摘要 |
<p>PURPOSE:To optionally set the shortest interval at the time of continuous access by hardware to a peripheral device by containing a circuit to determine the active timing of a control signal in a bus cycle according to the state of an input terminal, and inputting an access interval control signal from an external part. CONSTITUTION:The microprocessor is constituted by containing a CPU 1, an address bus 2, a data bus 3, and a control circuit 6 to control the control signal 5 to be outputted from the CPU 1. The control signal for the peripheral device can be turned into an in-active state by using the control signal control circuit 6 while extending the bus cycle of the CPU 1 by using access interval control input 7. Besides, the simple extension of the bus cycle too is possible by inputting bus cycle extension control input 8 to the CPU 1. Thus, the period of optional time during which the control signal is not outputted is generated during the bus cycle.</p> |
