| 摘要 |
PURPOSE: To minimize the number of clock cycles necessary for a computer by allowing data to pass through a bit clear logic without operating an input to an encoder at the first time of repeatedly passing through the bit clear logic and to pass through by operating data after then. CONSTITUTION: A bit outputted from a synthetic logic 20 is sent to a bit clear logic device 22 through a 32-bit signal line 121 and some bits are cleared or not cleared based on a zero signal to the synthetic logic 20. When the 32-bit signal passes through the bit clear logic device 22 at first, a signal inputted to the encoder 24 is not operated but in cycles after then the specific bit of the signal is cleared. The operation of the bit clear logic device 22 is controlled by a microcode sent from a line 17 by means of a latch 16. Thereby the number of the clock cycles necessary for the computer is reduced and the performance of a processor is improved. |
